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VERILOG® QUICKSTART A Practical Guide to Simulation and Synthesis in Verilog

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VERILOG® QUICKSTART
A Practical Guide to Simulation and Synthesis in Verilog
Third Edition
James M. Lee


Table of Contents 

1 INTRODUCTION

2 INTRODUCTION TO THE VERILOG LANGUAGE

3 STRUCTURAL MODELING

4 STARTING PROCEDURAL MODELING

5 SYSTEM TASKS FOR DISPLAYING RESULTS

6 DATA OBJECTS

7 PROCEDURAL ASSIGNMENTS

8 OPERATORS

9 CREATING COMBINATORIAL AND SEQUENTIAL LOGIC

10 PROCEDURAL FLOW CONTROL

11 TASKS AND FUNCTIONS

12 ADVANCED PROCEDURAL MODELING

13 USER-DEFINED PRIMITIVES

14 PARAMETERIZED MODULES

15 STATE MACHINES

16 MODELING TIPS

17 MODELING STYLE TRADE-OFFS

18 TEST BENCHES AND TEST MANAGEMENT

19 MODEL ORGAINZATION

20 COMMON ERRORS

21 DEBUGGING A DESIGN

22 CODE COVERAGE



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