Popular Posts

Most Viewed

The VLSI Handbook

Engineering books download,engineering books free download,engineering free books,download free engineering books,engineering books free free Download,free engineering book,engineering ebooks ,free engineering book download,free download of engineering books,engineering book download,engineering chemistry,download books for free,pdf books free,online books download,e books for free,books for free download
The VLSI Handbook
2nd Edition
Edited by
Wai-Kai Chen

Table of Contents 

 SECTION I VLSI Technology

1 Bipolar Technology

2 CMOS/BiCMOS Technology

3 Silicon-on-Insulator Technology

4 Sige HBT Technology

5 Silicon Carbide Technology

6 Passive Components

7 Power IC Technologies

8 Microelectronics Packaging

9 Multichip Module Technologies

SECTION II Devices and Their Models

10 Bipolar Junction Transistor

11 RF Passive IC Components

12 CMOS Fabrication

13 Analog Circuit Simulation

14 Interconnect Modeling and Simulation

SECTION III Low Power Electronics and Design

15 System-Level Power Management: An Overview

16 Communication-Based Design for Nanoscale SoCs 

17 Power-Aware Architectural Synthesis 

18 Dynamic Voltage Scaling for Low-Power Hard Real-Time Systems
19 Low-Power Microarchitecture Techniques and Compiler Design Techniques
20 Architecture and Design Flow Optimizations for Power-Aware FPGAs

21 Technology Scaling and Low-Power Circuit Design

SECTION IV Amplifiers

22 CMOS Amplifier Design

23 Bipolar Junction Transistor Amplifiers

24 High-Frequency Amplifiers

25 Operational Transconductance Amplifiers

SECTION V Logic Circuits

26 Expressions of Logic Functions

27 Basic Theory of Logic Functions

28 Simplification of Logic Expressions

29 Binary Decision Diagrams

30 Logic Synthesis with AND and OR Gates in Two Levels

31 Sequential Networks

32 Logic Synthesis with AND and OR Gates in Multi-Levels
33 Logic Properties of Transistor Circuits

34 Logic Synthesis with NAND (or NOR) Gates in Multi-Levels
35 Logic Synthesis with a Minimum Number of Negative Gates
36 Logic Synthesizer with Optimizations in Two Phases
37 Logic Synthesizer by the Transduction Method

38 Emitter-Coupled Logic


40 Pass Transistors

41 Adders

42 Multipliers

43 Dividers

44 Full-Custom and Semi-Custom Design

45 Programmable Logic Devices

46 Gate Arrays

47 Field-Programmable Gate Arrays

48 Cell-Library Design Approach

49 Comparison of Different Design Approaches

SECTION VI Memory, Registers and System Timing

50 System Timing



53 Embedded Memory

54 Flash Memories

55 Dynamic Random Access Memory

56 Content-Addressable Memory

57 Low-Power Memory Circuits

SECTION VII Analog Circuits

58 Nyquist-Rate ADC and DAC

59 Oversampled Analog-to-Digital and Digital-to-Analog Converters
60 RF Communication Circuits

61 PLL Circuits

62 Switched-Capacitor Filters

SECTION VIII Microprocessor and ASIC

63 Timing and Signal Integrity Analysis A

64 Microprocessor Design Verification

65 Microprocessor Layout Method

66 Architecture

67 Logic Synthesis for Field Programmable Gate Array (FPGA) Technology

SECTION IX Testing of Digital Systems

68 Design for Testability and Test Architectures

69 Automatic Test Pattern Generation

70 Built-In Self-Test

SECTION X Compound Semiconductor Integrated Circuit Technology

71 Compound Semiconductor Materials

72 Compound Semiconductor Devices for Analog and Digital Circuits 

73 Compound Semiconductor RF Circuits

74 High-Speed Circuit Design Principles

SECTION XI Design Automation

75 Internet-Based Micro-Electronic Design Automation (IMEDA) Framework
76 System-Level Design

77 Performance Modeling and Analysis Using VHDL and SystemC

78 Embedded Computing Systems and Hardware/Software Co-Design
79 Design Automation Technology Roadmap

SECTION XII VLSI Signal Processing

80 Computer Arithmetic for VLSI Signal Processing
81 VLSI Architectures for JPEG 2000 EBCOT: Design Techniques and Challenges
82 VLSI Architectures for Forward Error-Control Decoders
83 An Exploration of Hardware Architectures for Face Detection

84 Multidimensional Logarithmic Number System

SECTION XIII Design Languages

85 Languages for Design and Implementation of Hardware
86 System Level Design Languages 

87 RT Level Hardware Description with VHDL

88 Register Transfer Level Hardware Description with Verilog
89 Register-Transfer Level Hardware Description with SystemC
90 System Verilog

91 VHDL-AMS Hardware Description Language

92 Verification Languages

93 ASIC and Custom IC Cell Information Representation
94 Test Languages

95 Timing Description Languages

96 HDL-Based Tools and Environments

Click Here To Download


Post a Comment